| “Proposal for Capacitance Matching in Negative Capacitance Field Effect Transistors” Agarwal, H and Kushwaha, P and Lin, Y and Kao, M and Liao, Y and Dasgupta, A and Salahuddin, S and Hu, C IEEE Electron Device Letters, 1, 2019. |
| “Negative Capacitance Transistors” Wong, J C and Salahuddin, S Proceedings of the IEEE, 107, 1, 49–62, 2019. |
| “Spatially resolved steady-state negative capacitance” Yadav, Ajay K. and Nguyen, Kayla X. and Hong, Zijian and Garc\’ia-Fern\’andez, Pablo and Aguado-Puente, Pablo and Nelson, Christopher T. and Das, Sujit and Prasad, Bhagawati and Kwon, Daewoong and Cheema, Suraj and Khan, Asif I. and Hu, Chenming and \’I\~niguez, Jorge and Junquera, Javier and Chen, Long-Qing and Muller, David A. and Ramesh, Ramamoorthy and Salahuddin, Sayeef Nature, 565, 7740, 468–471, 2019. |
| “Negative Capacitance Transistors” Salahuddin, Sayeef Meeting Abstracts of ECS, MA2018-01, 22, 1367–1367, 2018. |
| “Negative Differential Resistance and Steep Switching in Chevron Graphene Nanoribbon Field-Effect Transistors” Smith, S and Llinus, J and Bokor, J and Salahuddin, S IEEE Electron Device Letters, 39, 1, 143–146, 2018. |
| “Negative-Capacitance FinFET Inverter, Ring Oscillator, SRAM Cell, and Ft” Li, K and Wei, Y and Chen, Y and Chiu, W and Chen, H and Lee, M and Chiu, Y and Hsueh, F and Wu, B and Chen, P and Lai, T and Chen, C and Shieh, J and Yeh, W and Salahuddin, S and Hu, C 2018 IEEE International Electron Devices Meeting (IEDM), 31.7.1–31.7.4, 2018. |
| “A Nitrided Interfacial Oxide for Interface State Improvement in Hafnium Zirconium Oxide-Based Ferroelectric Transistor Technology” Tan, A J and Yadav, A K and Chatterjee, K and Kwon, D and Kim, S and Hu, C and Salahuddin, S IEEE Electron Device Letters, 39, 1, 95–98, 2018. |
| “Negative-Capacitance FinFETs: Numerical Simulation, Compact Modeling and Circuit Evaluation” Duarte, J P and Lin, Y -. and Liao, Y -. and Sachid, A and Kao, M -. and Agarwal, H and Kushwaha, P and Chatterjee, K and Kwon, D and Chang, H -. and Salahuddin, S and Hu, C 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 123–128, 2018. |
| “Engineering Negative Differential Resistance in NCFETs for Analog Applications” Agarwal, H and Kushwaha, P and Duarte, J P and Lin, Y and Sachid, A B and Kao, M and Chang, H and Salahuddin, S and Hu, C IEEE Transactions on Electron Devices, 65, 5, 2033–2039, 2018. |
| “Improved Subthreshold Swing and Short Channel Effect in FDSOI n-Channel Negative Capacitance Field Effect Transistors” Kwon, D and Chatterjee, K and Tan, A J and Yadav, A K and Zhou, H and Sachid, A B and Reis, R D and Hu, C and Salahuddin, S IEEE Electron Device Letters, 39, 2, 300–303, 2018. |
| “Response Speed of Negative Capacitance FinFETs” Kwon, D and Liao, Y and Lin, Y and Duarte, J P and Chatterjee, K and Tan, A J and Yadav, A K and Hu, C and Krivokapic, Z and Salahuddin, S 2018 IEEE Symposium on VLSI Technology, 49–50, 2018. |
| “NCFET Design Considering Maximum Interface Electric Field” Agarwal, H and Kushwaha, P and Lin, Y and Kao, M and Liao, Y and Duarte, J and Salahuddin, S and Hu, C IEEE Electron Device Letters, 39, 8, 1254–1257, 2018. |
| “Variation Caused by Spatial Distribution of Dielectric and Ferroelectric Grains in a Negative Capacitance Field-Effect Transistor” Kao, M and Sachid, A B and Lin, Y and Liao, Y and Agarwal, H and Kushwaha, P and Duarte, J P and Chang, H and Salahuddin, S and Hu, C IEEE Transactions on Electron Devices, 65, 10, 4652–4658, 2018. |
| “Negative capacitance transistors” Salahuddin, S 2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 1, 2018. |
| “Multidomain Phase-Field Modeling of Negative Capacitance Switching Transients” Smith, S and Chatterjee, K and Salahuddin, S IEEE Transactions on Electron Devices, 65, 1, 295–298, 2018. |
| “Designing 0.5 V 5-nm HP and 0.23 V 5-nm LP NC-FinFETs With Improved ION/IOFF Sensitivity in Presence of Parasitic Capacitance” Agarwal, H and Kushwaha, P and Duarte, J P and Lin, Y and Sachid, A B and Chang, H and Salahuddin, S and Hu, C IEEE Transactions on Electron Devices, 65, 3, 1211–1216, 2018. |
| “Negative Capacitance, n-Channel, Si FinFETs: Bi-directional Sub-60 mV/dec, Negative DIBL, Negative Differential Resistance and Improved Short Channel Effect” Zhou, H and Kwon, D and Sachid, A B and Liao, Y and Chatterjee, K and Tan, A J and Yadav, A K and Hu, C and Salahuddin, S 2018 IEEE Symposium on VLSI Technology, 53–54, 2018. |
| “Effect of Polycrystallinity and Presence of Dielectric Phases on NC-FinFET Variability” Lin, Y and Kao, M and Agarwal, H and Liao, Y and Kushwaha, P and Chatterjee, K and Duarte, J P and Chang, H and Salahuddin, S and Hu, C 2018 IEEE International Electron Devices Meeting (IEDM), 9.4.1–9.4.4, 2018. |
| “The era of hyper-scaling in electronics” Salahuddin, Sayeef and Ni, Kai and Datta, Suman Nature Electronics, 2018. |
| “Ferroelectric negative capacitance domain dynamics” Hoffmann, Michael and Khan, Asif Islam and Serrao, Claudy and Lu, Zhongyuan and Salahuddin, Sayeef and Pe\vsi\’c, Milan and Slesazeck, Stefan and Schroeder, Uwe and Mikolajick, Thomas Journal of Applied Physics, 123, 18, 184101, 2018. |
| “Partial switching of ferroelectrics for synaptic weight storage” Kinder, E W and Alessandri, C and Pandey, P and Karbasian, G and Salahuddin, S and Seabaugh, A 2017 75th Annual Device Research Conference (DRC), 1–2, 2017. |
| “Work Function Engineering for Performance Improvement in Leaky Negative Capacitance FETs” Khan, A I and Radhakrishna, U and Salahuddin, S and Antoniadis, D IEEE Electron Device Letters, 38, 9, 1335–1338, 2017. |
| “Intrinsic speed limit of negative capacitance transistors” Chatterjee, K and Rosner, A J and Salahuddin, S. IEEE Electron Device Letters, 38, 9, 1328–1330, 2017. |
| “Full chip power benefits with negative capacitance FETs” Samal, S K and Khandelwal, S and Khan, A I and Salahuddin, S and Hu, C and Lim, S K 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 1–6, 2017. |
| “Ferroelectricity in HfO2 thin films as a function of Zr doping” Karbasian, G and Tan, A and Yadav, A and Sorensen, E M H and Serrao, C R and Khan, A I and Chatterjee, K and And and Salahuddin, S. 2017 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 1–2, 2017. |
| “Sustained Sub-60 mV/decade Switching via the Negative Capacitance Effect in MoS2 Transistors” McGuire, Felicia A and Lin, Yuh-Chen and Price, Katherine and Rayner, G Bruce and Khandelwal, Sourabh and Salahuddin, Sayeef and Franklin, Aaron D Nano Letters, 17, 8, 4801–4806, 2017. |
| “Impact of Parasitic Capacitance and Ferroelectric Parameters on Negative Capacitance FinFET Characteristics” Khandelwal, S and Duarte, J P and Khan, A I and Salahuddin, S and Hu, C IEEE Electron Device Letters, 38, 1, 142–144, 2017. |
| “Enabling Energy-Efficient Nonvolatile Computing With Negative Capacitance FET” Li, X and Sampson, J and Khan, A and Ma, K and George, S and Aziz, A and Gupta, S K and Salahuddin, S and Chang, M and Datta, S and Narayanan, V IEEE Transactions on Electron Devices, 64, 8, 3452–3458, 2017. |
| “Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device With 5.5-nm Hf0.8Zr0.2O2, High Endurance and Breakdown Recovery” Chatterjee, K and Kim, S and Karbasian, G and Tan, A J and Yadav, A K and Khan, A I and Hu, C and Salahuddin, S. IEEE Electron Device Letters, 38, 10, 1379–1382, 2017. |
| “In quest of the next information processing substrate” Datta, S and Seabaugh, A and Niemier, M and Raychowdhury, A and Schlom, D and Jena, D and Xing, G and Wong, H -. P and Pop, E and Salahuddin, S and Gupta, S and Guha, S 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC), 1–6, 2017. |
| “Differential voltage amplification from ferroelectric negative capacitance” Khan, Asif I. and Hoffmann, Michael and Chatterjee, Korok and Lu, Zhongyuan and Xu, Ruijuan and Serrao, Claudy and Smith, Samuel and Martin, Lane W. and Hu, Chenming and Ramesh, Ramamoorthy and Salahuddin, Sayeef Applied Physics Letters, 111, 25, 253501, 2017. |
| “Stabilization of ferroelectric phase in tungsten capped Hf 0.8 Zr 0.2 O 2“ Karbasian, Golnaz and dos Reis, Roberto and Yadav, Ajay K. and Tan, Ava J. and Hu, Chenming and Salahuddin, Sayeef Applied Physics Letters, 111, 2, 022907, 2017. |